Background
The archicture of a microprocessor typically includes a finite state machine (FSM) controller and a data path unit. These two systems acting together can run any given set of meaningful instructions and can therefore address a wide variety of problems.
Since this microprocessor is not used for mass production the number and cost of parts are negligible. If this was for a large market then we could put it all on one MSI or LSI chip. The overriding criteria used in design was to produce a high speed microprocessor. The first step in achieving high speed execution is to reduce the number of clock cycles per instruction. The optimal design would execute one instruction per cycle. This is what we did. When one instruction per cycle is achieved the FSM has only one state so it reduces to combinational logic. The programs to be run traditionally have been input from eight dip switches. We decided to implement our system so its programs would be stored on a GAL22v10. The reason is in a system such as this the programs are a trivial part; once written they do not change. Subsequently, it was a real time saver to have it on a chip. This way every time we powered up we did not have to reprogram the system. By utilizing this cartridge style system we were able to eliminate the eight dip switches and the button used to manually increment the program counter (PC). This innovative approach greatly simplified the overall system and saved many hours in the lab since the programs did not have to be reentered each time the system was powered up.
In the architecture of the microprocessor we have four 4-bit registers. In instructions that specify registers for use the source register is always referred to as S while the destination register is always referred to as D. There are three classes of instructions: register instructions, halt/IO instructions, and branch instructions. The register instructions can be further broken down into three distinct types which are: ADDC, ADD, and SUBC. See section three for a complete description of the instruction set.
We wanted the system interface to be as simple as possible for the user. We have seven-segment displays that show the PC, register D, user input from the dip switches. We also have switches for halting program execution at any time, single stepping, a go switch to resume full speed execution, and a reset switch to reset the system and begin execution again at address zero of the program.